Coreboot 25.09 release improves boot speeds and hardware support
The Coreboot project has released version 25.09, featuring 684 changes from 110 contributors that enhance boot performance and expand compatibility. Key updates include a 30% faster boot process and support for new motherboards from several manufacturers. These improvements aim to make the open-source firmware more efficient for modern hardware.
Coreboot 25.09, a free alternative to proprietary BIOS and firmware, was developed with contributions from 110 programmers, resulting in 684 changes that highlight the project's active community.
The release significantly boosts boot performance through optimizations in storage flow and payload decompression. By implementing SSE instructions for LZMA decompression, the SPI controller preloads data into the CPU cache without halting operations, achieving a 30% speedup and reducing boot time by 46 milliseconds on the Lenovo X220.
For Intel Panther Lake platforms, an asynchronous file loading system uses SPI DMA to preload the fsps.bin file while the CPU handles other tasks, cutting boot times by 17 to 18 milliseconds. New synchronization functions, such as cbfs_preload_wait_for_all(), ensure operations complete safely before storage backends shut down. The Fast SPI DMA subsystem now employs a token-based transfer queue for more predictable performance in complex environments.
A boot mode information framework introduces the LB_TAG_BOOT_MODE tag, allowing payloads to access boot status details like normal mode, low battery mode, or charging mode directly. This simplifies power management by eliminating redundant battery detection logic in payloads. The lb_add_boot_mode() function enables platform-specific customizations while maintaining backward compatibility.
Graphics initialization has been refined by restructuring MTRR records for graphics memory earlier in the silicon process, applied to the FSP-S module. This reduces subsystem initialization time from 123 to 115 milliseconds. The soc_mark_gfx_memory() function sets write-combined registers early, improving memory access and code maintainability.
Additional enhancements include optimizations in the amdfwtool for the Turin platform, updates to smmstoretool for variable block sizes and GUID aliases in UEFI variable management, and expanded TPM support with fTPM integration for AMD platforms. Logo rendering and Bochs display driver support have also improved, alongside stability measures for flash operations.
Tool updates encompass binutils 2.44, ACPICA 20250404, MPFR 4.2.2, SeaBIOS 1.17.0, and U-Boot 2025.07, with better LinuxBoot and Libpayload coordination. The next version, 25.12, is slated for late December.