Benchmarking

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Linux cache aware scheduling shows potential on AMD EPYC Turin

Lisa Kern

Recent benchmarks of Linux's proposed cache aware scheduling patches demonstrate significant performance improvements on AMD's EPYC Turin processors. The patches, developed by Intel engineers, aim to optimize task placement for better cache locality on multi-cache CPUs. Testing on a dual EPYC 9965 setup revealed promising results for heterogeneous server workloads.

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